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    A simulation based methodology for the development of embedded-analogue-mixed-signal systems using systemc-ams

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    Date
    2016-08
    Author
    Mulwa, Benjamin K_
    Type
    Thesis
    Language
    en
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    Abstract
    The development of embedded analog mixed signal systems has been a challenge especially in understanding the specifications of the required components and functionality of the system under development during the development process. In addition, to understand the interaction of components operating with mixed signals has been a problem since there has been no way in which this can be handled effectively. Since the development of electronic systems start from the functional down to the implementation, a methodology that can be used in all the development levels is required. In this work, a methodology that can be used to model and simulate embedded analogue mixed signal systems has been developed. This methodology, referred to as Model-Simulate-Refine-Synthesis (MSRS), has three stages – functional, non-functional and implementation. The three stages help the system developer to model and simulate in the three levels of system development. The MSRS methodology has been tested with two cases that are modeled and simulated using SystemC-AMS. The first case is the modeling and simulation of an oscilloscope. This case demonstrates the application of the methodology where analogue signals of different frequencies are sampled and displayed as digital waveforms. Among other things, architectural exploration seamlessly flows into implementation. In the second case, the same methodology has been used to model and simulate a signal generator. The simulation results are compared with a similar signal generator implemented in a Fusion FPGA. The waveforms produced by the Fusion FPGA are replicated by the simulated signal generator.
    URI
    http://hdl.handle.net/11295/97289
    Publisher
    University of Nairobi
    Subject
    Methodology for the Development
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    • Faculty of Science & Technology (FST) [4206]

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